CLKCTRLEN=0, CLKEN=0, CLKSEL=0x00
SD Clock Control Register
CLKSEL | SDHI Clock Frequency Select 0 (Others): Setting prohibited 0 (0x00): PCLKB/2 1 (0x01): PCLKB/4 2 (0x02): PCLKB/8 4 (0x04): PCLKB/16 8 (0x08): PCLKB/32 16 (0x10): PCLKB/64 32 (0x20): PCLKB/128 64 (0x40): PCLKB/256 128 (0x80): PCLKB/512 255 (0xFF): PCLKB |
CLKEN | SD/MMC Clock Output Control 0 (0): Disable SD/MMC clock output (fix SDnCLK signal low) 1 (1): Enable SD/MMC clock output |
CLKCTRLEN | SD/MMC Clock Output Automatic Control Select 0 (0): Disable automatic control of SD/MMC clock output 1 (1): Enable automatic control of SD/MMC clock output |